Contact Information

  • location_on
    Newai, P.O. Newai, District - Durg, Bhilai, Chhattisgarh 491107, India
  • call
    (0788) 2200062, 2445036
  • mail_outline
    (0788) 2445020
  • email
  • web_asset
  • Approved By: UGC AICTE DTE

M.E. (VLSI Design)


Duration:

2 Years

Eligibility:

Graduation

Course Detail

Course Code

Course title

Semester - I

 

560111 (28)

VLSI Technology

560112 (28)

VLSI System Design

560113 (28)

MOS Circuit Design

560114 (28)

Modelling with HDLs

Refer Table 1

Elective – I

560121 (28)

VHDL Modelling Laboratory

560122 (28)

Computer Simulation Laboratory

List of Elective - I

560131 (28)

CMOS RF Circuit Design

560132 (28)

Real Time System & Software

560133 (28)

Digital Image Processing

Semester - II

 

560211 (28)

Digital Logic with Verilog Design

560212 (28)

VLSI System Testing

560213 (28)

Low Power VLSI Design

560214 (28)

Embedded System Design

Refer Table II

Elective – II

560221 (28)

Verilog Design and verification Lab

560222 (28)

Embedded system Lab

List of Elective - II

560231 (28)

MEMS and IC integration

560232 (28)

MOS Physics

560233 (28)

Neural Network for VLSI

Semester - III

 

560311 (28)

Analog VLSI

Refer Table- III

Elective - III

560321 (28)

Project

560322 (28)

Seminar on Industrial Training

List of Elective - III

560331 (28)

Algorithm for VLSI Design Automation

560332 (28)

ASIC Design

560333 (28)

Design of Semiconductor Memories

Semester - IV

 

560421 (28)

Project + Seminar on Project

Note :

  • 1/4th of total strength of students subject to minimum of twenty students is required to offer an elective in the college in a Particular academic session.
  •  Choice of elective course once made for an examination cannot be changed in future examinations.