Vel Tech Rangarajan Dr. Sagunthala R and D Institute of Science and Technology Courses

M.Tech. (Embedded System Technologies)

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Duration: 2 Years

Eligibility: Graduation

Course Structure

Course Code	Course Title
Semester - I
PMAA05	Applied Mathematics
PEEA01	Advanced Digital System Design
PESA01	Real Time Operating System
PESA02	Advanced Digital Signal Processing
* * *	Elective I
Practical
PESA03	Real Time Operating System Lab
Semester - II
PESA04	Advanced Embedded Systems
PESA05	Embedded System Design
PVLA09	VLSI Design Techniques
PESA06	Real Time systems
PESA07	Embedded Networking
***	Elective II
Practical
PESA08	Embedded System lab
Semester - III
***	Elective III
***	Elective IV
***	Elective V
Practical
PESA41	Project Phase I
Semester - IV
PESA09	Project Phase II
List of Electives
PESA10	Digital Image Processing
PESA11	Wireless and Mobile Communication
PESA12	Embedded Control of Electrical Drives
PESA13	Advanced Microprocessors & Micro controllers Design
PVLA24	VHDL
PVLA25	System on Chip Design
PESA14	Embedded Control systems
PVLA06	ASIC Design
PESA15	Design of Embedded Communication Software
PESA16	Architecture and design of distributed embedded systems
PESA17	Software Modeling For Embedded Systems
PESA18	Embedded Processors and Peripherals
PESA19	Robotics and Automation

Course Detail

Semester  - I

PMAA05 Applied Mathematics                           

Unit-I:Numerical Solutions of Partial Differential Equations      

Classification of second order PDE – finite difference approximations to partial derivatives – elliptic equations - solution of Laplace equation – solution of Poisson’s equation - solution of elliptic equations by relaxation method – parabolic equations - solution of one-dimensional heat equation – hyperbolic equations – solution of wave equation

Unit-II: Linear Programming                                                     

Formulation of LP problems – graphical solution of two variable problems – simplex method – artificial variable techniques – Charne’s penalty method - two phase method – unrestricted variables – duality in linear programming – duality theorems (without proof) - shadow costs

Unit-III: Matrix Theory                                                               

Eigenvalues and eigenvectors of matrices – diagonalization of matrices – defective matrices - generalized eigenvectors – Jordan canonical form of matrices - pseudo-inverse of a matrix – least-square solutions of overdetermined linear systems – the method of normal equations

Unit-IV: One Dimensional Random Variables                                   

Random variables – probability distribution – moments – moment generating functions and their properties – binomial, Poisson, geometric, uniform, exponential, gamma and normal distributions – function of a random variable

Unit-V: Queueing Models                                                            

 Basics of queueing models –Poisson queue systems – transient state probability – steady state probabilities – single and multi-server models with finite and infinite capacity – Little’s formula - (M-G-1) queueing model – Pollaczek-Khinchine formula

 

PEEA01   Advanced Digital System Design                 

Unit-I : Sequential Circuit Design                                                                                                  

Analysis of Clocked Synchronous Sequential Networks (CSSN) Modeling of CSSN – State Stable Assignment and Reduction – Design of CSSN – Design of Iterative Circuits – ASM Chart – ASM Realization.

Unit-II: Asynchronous Sequential Circuit Design

Analysis of Asynchronous Sequential Circuit (ASC) – Flow Table Reduction – Races in ASC – State Assignment – Problem and the Transition Table – Design of ASC – Static and Dynamic Hazards – Essential Hazards – Data Synchronizers – Designing Vending Machine Controller – Mixed Operating Mode Asynchronous Circuits.

Unit-III: Fault Diagnosis And Testability Algorithms                   

Fault Table Method – Path Sensitization Method – Boolean Difference Method – Kohavi  Algorithm – Tolerance Techniques – The Compact Algorithm – Practical PLA’s – Fault in PLA – Test Generation – Masking Cycle – DFT Schemes – Built-in Self Test.

Unit-IV: Synchronous Design Using Programmable Devices                                                       

EPROM to Realize a Sequential Circuit – Programmable Logic Devices – Designing a Synchronous Sequential Circuit using a GAL – EPROM – Realization State machine using PLD – FPGA – Xilinx FPGA – Xilinx 2000 - Xilinx 3000

Unit-V: System Design Using VHDL

VHDL Description of Combinational Circuits – Arrays – VHDL Operators – Compilation and Simulation of VHDL Code – Modeling using VHDL – Flip Flops – Registers – Counters – Sequential Machine – Combinational Logic Circuits - VHDL Code for – Serial Adder, Binary Multiplier – Binary Divider – complete Sequential Systems – Design of a Simple Microprocessor.

 

PESA01 Real Time Operating System                

Unit-I: Review Of Operating Systems                         

Basic Principles – System Calls – Files – Processes – Design and Implementation of processes – Communication between processes – Operating System structures.

Unit-II: Distributed Operating Systems                                 

Topology – Network types – Communication – RPC – Client server model – Distributed file system – Design strategies.

Unit-III: Real Time Models And Languages                           

Event Based – Process Based and Graph based Models – Petrinet Models – Real Time Languages – RTOS Tasks – RT scheduling - Interrupt processing – Synchronization – Control Blocks – Memory Requirements.

Unit-IV: Real Time Kernel                                                           

Principles – Design issues – Polled Loop Systems – RTOS Porting to a Target – Comparison and study of various RTOS like QNX, VX works, PSOS, C Executive – Case studies.

Unit-V: RTOS Application Domains                                          

RTOS for Image Processing – Embedded RTOS for voice over IP – RTOS for fault Tolerant Applications – RTOS for Control Systems.

 

PESA02  Advanced Digital Signal Processing

Unit-I: Discrete Time Signals And Systems                                   

Representation of discrete time signal - classifications - Discrete time - system - Basic operations on sequence - linear - Time invariant - causal - stable - solution to difference equation - convolution sum - correlation - Discrete time Fourier series - Discrete time Fourier transform.

Unit-II: Fourier And Structure Realization                                               
Discrete Fourier transform - properties - Fast Fourier transform - Z-transform - structure realization - Direct form - lattice structure for FIR filter - Lattice structure for IIR Filter.

Unit-III: Filters                                                                              
FIR Filter - windowing technique - optimum equiripple linear phase FIR filter - IIR filter - Bilinear transformation technique - impulse invariance method - Butterworth filter - Tchebyshev filter.

Unit-IV: Multistage Representation                                                          
Sampling of band pass signal - anti aliasing filter - Decimation by a n integer factor - interpolation by an integer factor - sampling rate conversion - implementation of digital filter banks - sub-band coding - Quadrature mirror filter - A/D conversion - Quantization - coding - D/A conversion - Introduction to wavelets.

Unit-V: Digital Signal Processors                                      

Fundamentals of fixed point DSP architecture - Fixed point number representation and computation - Fundamentals of floating point DSP architecture - floating point number representation and computation - study of TMS 320 C 54XX processor - Basic programming - addition - subtraction - multiplication - convolution - correlation - study of TMS 320 F2XXX processor - Basic programming - convolution - correlation.

 

PESA03  Real Time Operating System Lab       

List of Experiments:

• RTOS porting on available microcontroller board.
• Interfacing of 4x4 Keyboard and LCD  to a microcontroller using RTOS  task.
• Interfacing of 4x4 Keyboard, 16x2 LCD display and ADC to a microcontroller using RTOS Tasks.
• Implement a semaphore for any given task switching on a microcontroller
• Implementation of mutual exclusion in tasks
• Implementation of event control blocks and its management in tasks
• Implementation of mailbox in tasks
• Implementation of  message queue management in tasks
• Implementation of memory management in tasks
• Implementation of temperature controller using RTOS.

 

Semester - II

PESA04   Advanced Embedded Systems                      

Unit-I: Introduction And Review Of Embedded Hardware

Terminology – Gates – Timing diagram – Memory – Microprocessor buses – Direct memory access – Interrupts – Built interrupts – Interrupts basis – Shared data problems – Interrupt latency - Embedded system evolution trends – Round-Robin – Round Robin with interrupt function – Rescheduling architecture – algorithm.

Unit-II: Real Time Operating System                                              

Task and Task states – Task and data – Semaphore and shared data operating system services – Message queues timing functions – Events – Memory management – Interrupt routines in an RTOS environment – Basic design using RTOS.

Unit-III: Embedded Hardware, Software And Peripherals                         

Custom single purpose processors: Hardware – Combination Sequence – Processor design – RT level design – optimising software: Basic Architecture – Operation – Programmers view – Development Environment – ASIP – Processor Design – Peripherals – Timers, counters and watch dog timers – UART – Pulse width modulator – LCD controllers – Key pad controllers – Stepper motor controllers – A/D converters – Real time clock.

Unit-IV: Memory And Interfacing                                                        

Memory: Memory write ability and storage performance – Memory types – composing memory – Advance RAM interfacing communication basic – Microprocessor interfacing I/O addressing – Interrupts – Direct memory access – Arbitration multilevel bus architecture – Serial protocol – Parallel protocols – Wireless protocols – Digital camera example.

Unit-V: concurrent Process Models and Hardware Software Co-Design

Modes of operation – Finite state machines – Models – HCFSL and state charts language – state machine models – Concurrent process model – Concurrent process – Communication among process –Synchronization among process – Implementation – Data Flow model.  Design technology; Automation synthesis – Hardware software co-simulation – IP cores – Design Process Model.

 

PESA05   Embedded System Design                             

Unit-I: Introduction                                                                                 

Embedded Design life cycle – Product specification – Hardware / Software partitioning, Detailed hardware and software design, Integration, Product testing, Selection Processes – Microprocessor Vs Micro Controller – Performance tools, Bench marking, RTOS Micro Controller – Performance tools, Bench marking, RTOS availability, Tool chain availability, Other issues in selection processes.

Unit-II: Partioning                                                                        

Partitioning decision – Hardware / Software duality, coding Hardware – ASIC revolution – Managing the Risk, Co-verification, execution environment, memory organization, System startup – Hardware manipulation – memory, mapped access, speed and code density.

Unit-III: Interrupt Service Routines                           

Interrupt Service routines – Watch dog timers – Flash memory Basic toolset – Host and debugging – Remote debugging – ROM emulators, logic Analyzer, Caches – Computer optimization – Statistical profiling - Serial/parallel port interfacing and drivers, DMA & high speed I/O interfacing, Memory selection for embedded systems.

Unit-IV: Emulators and Testing                                                

Buller proof run control – Real time trace, Hardware break points –Timing constraints – Triggers, Testing, Bug tracking, reduction of risks & costs – Performance – Unit testing, Regression testing, Choosing test cases – Functional tests, Coverage tests, Testing embedded software .

Unit-V: Real Time Systems                                                                     

Characterizing real time systems & tasks - Performance measures, Estimating program runtimes, Task assignment & scheduling, Real time operating systems (RTOS), Task management, Race condition - Inter-task communication, Implementation aspects and estimation modeling in embedded systems, Validation and debugging of embedded systems, Real time communication - Hardware-software co-design in an embedded system, Applications of real time systems.

 

PVLA0  VLSI Design Techniques                       

Unit-I: Introduction                                                                                                            
Overview of digital VLSI design methodologies - Trends in IC Technology - Advanced Boolean algebra - Shannon's expansion theorem - Consensus theorem - Octal designation- Run measure - Buffer gates - Gate expander - Reed Muller expansion - Synthesis of multiple output combinational logic circuits by product map method - Design of static hazard free, dynamic hazard free logic circuits.

Unit-II: Analog VLSI and High Speed VLSI                                               
Introduction to analog VLSI - realization of neural networks and switched capacitor filters - Sub-micron technology and GAs VLSI Technology.

Unit-III: Programmable ASICs                                                     

Anti fuse - static RAM - EPROM and technology - PREP bench marks - Actel ACT - Xilinx LCA - Altera flex - Altera MAX DC & AC inputs and outputs - Clock and power inputs - Xilinx I/O blocks.

Unit-IV: Programmable ASIC Design Software                                                                
Actel ACT - Xilinx LCA - Xilinx EPLD - Altera MAX 5000 and 7000 - Altera MAX 000 - design systems - logic synthesis - half gate - schematic entry - Low level design language - PLA tools - EDIF - CFI design representation.

Unit-V: Logic Synthesis, Simulation And Testing                                       
Basic features of VHDL language for behavioral modeling and simulation - Summary of VHDL data types - Dataflow and structural modeling - VHDL and logic synthesis - Circuit and layout verification - Types of simulation - Boundary scan test - Fault simulation - Automatic test pattern generation - design examples.

 

PESA06   Real Time Systems                              

Unit-I: Introduction                                                                                                       

Introduction – Issues in Real Time Computing, Structure of a Real Time System, Task classes, Performance Measures for Real Time Systems, Estimating Program Run Times. Task Assignment and Scheduling – Classical uniprocessor scheduling algorithms, Uniprocessor scheduling of IRIS tasks, Task assignment, Mode changes, and Fault Tolerant Scheduling.

Unit-II: Programming Languages and Tools                                                         

Programming Languages and Tools – Desired language characteristics, Data typing, Control structures, Facilitating Hierarchical Decomposition, Packages, Run – time (Exception) Error handling, Overloading and Generics, Multitasking, Low level programming, Task Scheduling, Timing Specifications, Programming Environments, Run – time support.

Unit-III: Real Time Databases                                                                                          

Real time Databases – Basic Definition, Real time Vs General Purpose Databases, Main Memory Databases, Transaction priorities, Transaction Aborts, Concurrency control issues, Disk Scheduling Algorithms, Two – phase Approach to improve Predictability, Maintaining Serialization Consistency, Databases for Hard Real Time Systems.

Unit-IV: Communication                                                                                                     

Real – Time Communication – Communications media, Network Topologies Protocols, Fault Tolerant Routing. Fault Tolerance Techniques – Fault Types, Fault Detection. Fault Error containment Redundancy, Data Diversity, Reversal Checks, Integrated Failure handling.

Unit-V:  Evaluation Techniques                                                                                     

Reliability Evaluation Techniques – Obtaining parameter values, Reliability models for Hardware Redundancy, Software error models. Clock Synchronization – Clock, A Nonfault – Tolerant Synchronization Algorithm, Impact of faults, Fault Tolerant Synchronization in Hardware, Fault Tolerant Synchronization in software.

 

PESA07    Embedded Networking                                    

Unit-I:                                                                                 

Embedded networking – code requirements – Communication requirements – Introduction to CAN open – CAN open standard – Object directory – Electronic Data Sheets & Device – Configuration files – Service Data Objectives – Network management CAN open messages – Device profile encoder.

Unit-II:                                                                                 

CAN open configuration – Evaluating system requirements choosing devices and tools – Configuring single devices – Overall network configuration – Network simulation – Network Commissioning – Advanced features and testing.                                                          

Unit-III:                                                                               

Controller Area Network – Underlying Technology CAN Overview – Selecting a CAN Controller – CAN development tools.                                                                               

Unit-IV:                                                                                

Implementing CAN open Communication layout and requirements – Comparison of implementation methods – Micro CAN open – CAN open source code – Conformance test – Entire design life cycle.                                                                                       

Unit-V:                                                                                              

Implementation issues – Physical layer – Data types – Object dictionary – Communication object identifiers – Emerging objects – Node states.                                                        

 

PESA08  Embedded Systems Lab                      

• Micro controller 8051/8031 & Flash controller programming
  • Simple application programs with kit and through assembler
  • Data flash with erase, verify, fusing through ATMEL and INTEL tools.
• Testing RTOS Environment and System Programming.
  • Keil Tools
  • RTOS System Solutions with Tornado tools.
• Complex Programmable Logic Devices and Device Programming with VHDL fitter and Cool runner
  • Warp tools-Cypress-Active HDL Simulator & Galaxy-VHDL, FSM models
  • Mixed signal handling.
• Third party design tools
  • Mentor Graphics
  • Cadence.
• VLSI designing with various Tools and Design methodologies
  • AT40K FPGA series-synthesis-design-simulation of application programs.
  • Xilinx EDA design tools-device programming – PROM programming.
  • ALTERA and Mentor graphics-IC design tools.
• Embedded DSP based System Designing.
  • Code compressor studio for embedded DSP using Texas tool kit.
  • Analog DSP tool kit.
• IPCORE usage in VOIP Through SoC2 tools
  • Cypress PsoC designing Tools
  • SoPC designing Tools
• FPSLIC synthesis, Designing and Testing and BLUE TOOTH wireless Communication Designing.
  • ATMEL FPSLIC tools 
  • CYPRESS BLUE TOOTH tools.

List of Electives

PESA10   Digital Image Processing                  

Unit-I: Fundamentals Of Image Processing                                                                               

Introduction – Steps in image processing systems – Image acquisition – Sampling and Quantization – Pixel relationships – Color fundamentals and models, File formats, Image operations – Arithmetic, Geometric and Morphological.

Unit-II: Image Enhancement                                                                                  

Spatial Domain: Gray level Transformations – Histogram processing – Spatial filtering smoothing and sharpening. Frequency Domain: Filtering in frequency domain – DFT, FFT, DCT – Smoothing and sharpening filters – Homomorphic Filtering.

Unit-III: Image Segmentation and Feature Analysis                                     

Detection of Discontinuities – Edge operators – Edge linking and Boundary Detection – Thresholding – Region based segmentation – Morphological Watersheds – Motion Segmentation, Feature Analysis and Extraction.

Unit-IV: Multi Resolution Analysis and Compressions                                

Multi Resolution Analysis: Image Pyramids – Multi resolution expansion – Wavelet Transforms. Image compression: Fundamentals – Models – Elements of Information Theory – Error free compression – Lossy Compression – Compression Standards.

Unit-V: Applications Of Image Processing                                                           

Image classification – Image recognition – Image understanding – Video motion analysis – Image fusion – Steganography – Digital compositing – Mosaics – Colour Image Processing.

                                     

PESA11  Wireless and Mobile Communication         

Unit-I: Introduction                                                                                  

Wireless Transmission-signal propagation-spread spectrum-Satellite Networks-Capacity Allocation-FAMA-DAMA-MAC

Unit-II: Mobile Networks                                                                                                       

Cellular Wireless Networks-GSM-Architecture-Protocols-Connection Establishment-Frequently Allocation-Routing-Handover-Security-GPRA

Unit-III: Wireless Networks                                                                                            

Wireless LAN-IEEE 802.11 Standard-Architecture-Services-AdHoc Network-HiperLan-Blue Tooth

Unit-V: Routing                                                                                                                  

Mobile IP-DHCP- AdHoc Networks-Proactive and Reactive Routing Protocols-Multicast Routing

Unit-V: Transport and Application Layers                                                            

TCP over Adhoc Networks-WAP-Architecture-WWW Programming Model-WDP-WTLS-WTP-WSP-WAE-WTA Architecture-WML-WML scripts

 

PESA12   Embedded Control Of Electrical Drives       

Unit-I: Introduction                                                                                 

Electric drive systems - solid state devices - solid state switching circuits – characteristics of elective motors - speed torque characteristics of electric motors – PWM techniques - rating and heating of motors.

Unit-II: AC and DC Electric Drives                                            

Introduction – classification of electric drives – dynamic conditions of a drive system – stability considerations of electrical drives – dc choppers, inverters, cycloconverters, ac voltage controllers, stepper motor.

Unit-III: Power Converters                                                                    

Induction motor drives – synchronous motor drives – dc drives – block diagram representation of drive systems, signal flow graph representation of the systems, transient response, frequency response, stability of controlled drives.

Unit-IV: Closed Loop Control Of Electrical Drives                            

Drive considerations – control system components – mathematical preliminaries – Nyquist stability criterion – Assessment of relative stability using Nyquist criterion – closed loop frequency response – sensitivity analysis in frequency domain – PID controllers – feed back compensation, robust control system design.

Unit-V: Microcontrollers and DSP Applications                    

Introduction – dedicated hardware system versus microcontroller control – application areas and functions of microcontroller and dsp in drive technology – control of electric drives using microcontroller and dsp – control system design of microcontroller based variable speed drives – applications in textile mills, steel rolling mills, cranes and hoist drives, cement mills, sugar mills, machine tools, coal mills, paper mills, centrifugal pumps, turbo compressors.

 

PESA13  Advanced Microprocessors and Microcontrollers Design

Unit-I: Microprocessor Architecture                                                                      

Instruction set – Data formats – Instruction formats – Addressing modes – Memory Hierarchy – register file – Cache – Virtual memory and paging – Segmentation – Pipelining – The instruction pipeline – pipeline hazards – Instruction level parallelism – reduced instruction set – Computer principles – RISC versus CISC &nda sh; RISC properties – RISC evaluation – On-chip register files versus cache evaluation.

Unit-II: High Performance Cisc Architecture – Pentium                       

The software model – functional description – CPU pin descriptions – RISC concepts – bus operations – Super scalar architecture – pipe lining – Branch prediction – The instruction and caches – Floating point unit – protected mode operation – Segmentation – paging – Protection – multitasking – Exception and interrupts – Input/Output – Virtual 8086 model – Interrupt processing – Instruction types – Addressing modes – Processor flags – Instruction set – Basic programming the Pentium Processor.

Unit-III: High Performance Risc Architecture: ARM                       

The ARM architecture – ARM organization and implementation – The ARM instruction set – The thumb instruction set – Basic ARM Assembly language program – ARM CPU cores.

Unit-V: Motorola 68HC11 Micro Controllers                                          

Instructions and addressing modes – operating modes – Hardware reset – Interrupt system – Parallel I/O ports – Flats – Real time clock – Programmable timer – pulse accumulator – serial communication interface – A/D converter – hardware expansion – Basic Assembly Language programming.

Unit-V: PIC Micro Controllerand ARM                                                      

CPU Architecture – Instruction set – Interrupts – Timers – Memory – I/O port expansion – I²C bus for peripheral chip access – A/D converter – UART.-ARM organization and implementation ,The ARM instruction set ,The thumb instruction set, Basic ARM assembly language program,ARM CPU cores

 

PVLA24 VHDL                                                      

Unit-I: VHDL Fundamentals                                                                              

Fundamental Concepts – Modeling Digital Systems – Domains and Levels of Modeling – Modeling Languages – VHDL Modeling concepts – Scalar Data Types and Operations – Constants and variables – Scalar Types – Type Classification – Attributes and Scalar types – Expressions and operators – Sequential Statements – If statements – Case statements – Null Statements – Loop statements – Assertion and Report statements.

Unit-II: Composite Data Types and Basic Modeling Constructs           

Arrays – Unconstrained Array types – Array Operations and Referencing – Records – Basic Modeling Constructs – Entity Declarations – Architecture Bodies – Behavioral Descriptions – Structural Descriptions – Design Processing. Case Study: A pipelined Multiplier Accumulator.

Unit-III: Subprograms and Packages                                                            

Procedures – Procedure Parameters – Concurrent Procedure Call Statements – functions – Overloading – Visibility of Declarations – Packages and Use Clauses – Package declarations – Package bodies – Use Clauses – The predefined – Aliases  - Aliases for data objects – Aliases for Non-Data Items.

Case Study: A Bit-Vector Arithmetic Package.

Unit-IV: Signals, Components, Configurations                                               

Basic Resolved signals – IEEE Std_Logic_1164 Resolved subtypes – Resolved signal parameters – Generic Constants – Parameterizing behavior – Parameterizing structure – Components and Configurations – Components – Configuring component Instances – Configuration Specification – Generate Statements – generating iterative structure – Conditionally generating structures – Configuration of generate Statements.

Case Study: The DLX Computer System.

Unit-V:  ADTS and Files                                                                                   

Access Types – Linked Data structures – Abstract Data Types using Packages – Files and Input/Output – Files – The Package Textio – Verilog.

Case Study: Queuing Networks.                                                                    

 

PVLA25  System on Chip Design                         

 Unit-I: SOC Fundamentals                                                                                                   
Essential issues of SoC design - A SoC for Digital still camera - multimedia IP development : Image and video codecs.

Unit-II: SOC Software and Energy Management                         
SoC embedded software - energy management techniques for SoC design.

Unit-III: System Design and Methodology                                              
Design methodology for NOC based systems - Mapping concurrent application onto architectural platforms.

Unit-IV: Hardware And Basic Infrastructure                                
Packet switched network for on-chip communication - energy reliability tradeoff for NoC's - clocking strategies - parallel computer as a NoC's region.

Unit-V: Software And Application Interfaces                    
MP-SoC from software to hardware - NoC APIs - multilevel software validation for NoC - Software for network on chip

 

PESA14   Embedded Control Systems              

Unit-I: Introduction

Controlling the hardware with software – Data lines, Address lines, Ports – Schematic representation – Bit masking – Programmable peripheral interface – Switch input detection – 74 LS 244

Unit-II: Input-Output Devices                                                                                      

Keyboard basics – Keyboard scanning algorithm – Multiplexed LED displays – Character LCD modules, LCD module display, Configuration – Time-of-day clock – Timer manager - Interrupts - Interrupt service routines, IRQ, ISR, Interrupt vector or dispatch table multiple-point - Interrupt-driven pulse width modulation.

Unit-III: D/A and A/D Conversion                                                                               

R 2R ladder - Resistor network analysis - Port offsets - Triangle waves analog vs. digital values - ADC080 – Auto port detect - Recording and playing back voice – Capturing analog information in the timer interrupt service routine - Automatic, multiple channel analog to digital data acquisition.

Unit-IV: Asynchronous Serial Communication                                 

Asynchronous serial communication – RS-232, RS-485 – Sending and receiving data – Serial ports on PC – Low-level PC serial I/O module, Buffered serial I/O.    

Unit-V: Case Studies: Embedded C Programming                            

Multiple closure problems – Basic outputs with PPI – Controlling motors – Bi-directional control of motors – H bridge – Telephonic systems – Stepper control – Inventory control systems.

 

PVLA06  Asic Design                                             

Unit-I: Introduction To ASICS, CMOS Logic and ASIC Library Design;
Types of ASICs - Design Flow - CMOS transistors, CMOS design rules - Combinational Logic Cell - Sequential logic cell - Data path logic cell - Transistors as Resistors - Transistor Parasitic Capacitance - Logical effort - Library cell design - Library architecture.

Unit-II: Programmable Logic Cells and I/O Cells                                                            
Anti fuse - static RAM - EPROM and EEPROM technology - PREP bench marks - Actel ACT - Xilinx LCA - Altera FLEX - Altera MAX DC & AC inputs and outputs - Clock and power inputs - Xilinx I/O blocks.

Unit-III: Interconnects and ASIC Design Software                                 
Actel ACT - Xilinx LCA - Xilinx EPLD - Altera MAX 5000 and 7000 - Altera MAX 000 Altera FLEX - Design systems - Logic Synthesis - Half Gate ASIC - Schematic entry - Low level design language - PLA tools - EDIF - CFI design representation.

Unit-IV: Logic Synthesis, Simulation And Testing                                                             
Verilog and logic synthesis - VHDL and logic synthesis - Types of simulation - Boundary scan test - Fault simulation - Automatic test pattern generation. Built-in self test.

Unit-V: Floor Planning, Placement And Routing                                                    
System partition - FPGA partitioning - partitioning methods - floor planning - placement - physical design flow - global routing - detailed routing - special routing - circuit extraction - DRC.

 

PESA15    Design of Embedded Communication Software 

Unit-I: Introduction To Communication                                                                              
OSI Reference Model Communication Devices - Communication Echo System Design Consideration - Host Based Communication - Embedded Communication System - OS Vs RTOS.

Unit-II: Software Partitioning                                                       
Limitation of strict Layering - Tasks & Modules - Modules and Task Decomposition -Layer2 Switch - Layer3 Switch / Routers - Protocol Implementation - Management Types - Debugging Protocols.

Unit-III: Tables & Other Data Structures                                                 
Partitioning of Structures and Tables - Implementation - Speeding Up access - Table Resizing - Table access routines - Buffer and Timer Management - Third Party Protocol Libraries.

Unit-IV: Management Software                                                                
Device Management - Management Schemes - Router Management - Management of Sub System Architecture - Device to manage configuration - System Start up and configuration.

Unit-V: Multi Board Communication Software Design                  
Multi Board Architecture - Single control Card and Multiple line Card Architecture - Interface for Multi Board software - Failures and Fault - Tolerance in Multi Board Systems - Hardware independent development - Using a COTS Board - Development Environment - Test Tools.

 

PESA16 Architecture and Design of Distributed Embedded Systems                 

Unit-I: Hardware Infrastructure                                                                 
Broad band transmission facilities -Open interconnection standards- types of network- network principles- Ethernet- Wireless- LAN and ATM.

Unit-II: Software Architecturer & Internet Concepts                  

Internet protocol- Hardware & software of internet- Internet security- IP addressing- Interfacing internet server applications to corporate database HTML and XML.

Unit-III: Distributed Computing Using Java                                                        
IO streaming- object serialization-Networking- threading- RMI- Multicasting.

Unit-IV: Distributed Database Using Java                                                                        
Distributed database- Embedded java concepts -Communication between distributed objects.

Unit-V: Design Methodology & Architecture                                                         
Analog/digital co-design- design method based on multiprocessors-architecture for reliable distributed computer controlled systems- Optimization of functional distribution in complex system design.

 

PESA17 Software Modeling For Embedded Systems

Unit-I: Introduction To Data Representation                                            
Data representation - Twos complement, fixed point and floating point number formats -Low level programming in C - Primitive data types - Functions - recursive functions - Pointers - Structures - Unions - Dynamic memory allocation - File handling - Linked lists.

Unit-II: Programming In Assembly                                                                       
C and assembly - Programming in assembly - Register usage conventions - Typical use of addressing options - Instruction sequencing - Procedure call and return - Parameter passing - Retrieving parameters - Everything in pass by value - Temporary variables - threads - preemptive kernels - system timer - scheduling.

Unit-III: Object Oriented Analysis                                                                       
Object oriented analysis and design- Connecting the object model with the use case model - Key strategies for object identification - UML basics.

Unit-IV: Unified Modeling Language                                                         
Object state behavior - UML state charts - Role of scenarios in the definition of behavior - Timing diagrams - Sequence diagrams - Event hierarchies - types and strategies of operations - Architectural design in UML concurrency design - threads in UML .

Unit-V: Software / Hardware Partitioning                                    
Software / Hardware partitioning - Co design overview - Co simulation, synthesis and verifications - Re-configurable computing - System on Chip (SoC) and IP cores - Low-Power RT Embedded Systems - On-chip Networking .

 

PESA18    Embedded Processors & Peripherals          

Unit-I: Introduction                                                                                 

Introduction to Processor and peripherals – keyboards – Multiplexed LED Displays – Character LCD modules – Time of Day Clock – Timer Manager – Discrete Inputs and Outputs – Fixed point Math – Analog Math.

Unit-II: Analog DSP                                                                                  

Analog DSP “Blackfin” Processor – introduction, architecture, features, applications - instruction-set architecture and hardware micro architecture – ADSP 2100 – introduction, architecture, features, applications.

Unit-III: ARM Processor                                                                          

Introduction, architecture, instruction set, addressing modes, applications – PalmOne OS5-based device with ARM processor – ARM application processor – ARM720T and ARM20T.

Unit-IV: OMAP                                                                                                                                

Introduction, architecture, instruction set, addressing modes, applications – OMAP510 – module overview, display specification, LCD controller operation, Lookup palette, color dithering, output FIFO, LCD controller pins, LCD controller registers, interface to LCD panel signal reset values.

Unit-V: Case Study                                                                        

Audio/video and VOIP application for multimedia application using OMAP TI-5012 – TI OMAP Applications Processor - OMAP2420 and OMAP1710 – architecture, features, and applications.

 

PESA1  Robotics & Automation               

Unit-I: Introduction                                                                                                                     

Definition – need - robot classification - terminology and systems - benefits and limitations – basic problems of intelligent robotics – computers for logic and logic programming.

Unit-II: Robot System                                                                                         

Robot physical configuration - basic robot motions - end effectors work cell control and interlocks.

Unit-III: Robort Sensors                                                                         

Vision tactile and proximity – voice - robot control - kinetics and necessary control systems – advanced programming skills to write AI robotic programs in LISP.

Unit-IV: Robot Application                                                                                             

General considerations and problems - material transfer - machine loading – welding - spray coating - processing operations – assembly – inspection - robot in FMS and automation – robots in health care and intelligent homes

Unit-V: Robot Arm Kinematics                                                                                       

Robot arm kinematics - Homogenous transformation matrix.